The invention relates to a circuit having an external supply voltage junction point and an internal supply voltage junction point and a voltage converter arranged between said junction points, for connecting to the internal supply voltage junction point an internal supply voltage which is lower than the supply voltage across the external junction point.
Such a circuit is disclosed in the Netherlands patent application 8701472. Since the dimensions of transistors and other components of an integrated circuit are getting increasingly smaller, the distances across which voltages of the order of the supply voltage also become increasingly smaller. This results in high electric field strengths which produce inter alia what is commonly denoted "hot carrier stress" in, for example, field effect transistors. For reasons of reliability it is therefore necessary to use a supply voltage lower than the standard 5V supply voltage for MOS components having, for example, channel lengths less than 1 .mu.m (so-called submicron components). The prior art integrated circuit has an external (5 V) and an internal supply voltage junction point, between which a voltage converter is arranged which repeatedly charges a parasitic capacitance which is connected in parallel with the internal supply voltage junction point. This capacitance is used as a current supply for the integrated circuit. The voltage converter includes a detector circuit which, in dependence on the voltage across the internal supply voltage junction point and with a certain hysteresis switches an electronic switch which is arranged between the internal and the external supply voltage junction point. This known integrated circuit has the drawback that the switching rate of the circuit and the problem of hot carrier stress vary greatly with temperature.